This invention relates to electronic oscillating circuits and, more particularly, to phase locked loops.
This invention further relates to the transceiver and components thereof described and claimed in the following U.S. Patent Applications filed Apr. 27, 1977 and assigned to the assignee of the present invention: U.S. Pat. No. 4,145,655 entitled "A Digitally Transmitting Transceiver" by Edward R. Caudel and William R. Wilson; U.S. Pat. No. 4,132,950 entitled "A Clarifying Radio Receiver" by Michael J. cochran and Edward R. Caudel; U.S. Ser. No. 791,449 entitled "An Automatically Clarifying Radio Receiver" by Michael J. Cochran and Edward R. Caudel; U.S. Ser. No. 791,450 entitled "A Transceiver With Only One Reference Frequency" by Michael J. Cochran; U.S. Pat. No. 4,137,499 entitled "A Signal Strength Measuring Transceiver" by Edward R. Caudel; U.S. Pat. No. 4,153,876 entitled "A Charge Transfer Device Radio System" by Michael J. Cochran; U.S. Pat. No. 4,145,656 entitled "A Transceiver Capable of Sensing A Clear Channel" by Jerry D. Merryman, Michael J. Cochran and Edward R. Caudel; U.S. Pat. No. 4,140,075 entitled "A Highly Selective Programmable Filter Module" by Michael J. Cochran and Edward R. Caudel; and U.S. Pat. No. 4,147,984 entitled "A Dual Processor Transceiver" by Edward R. Caudel, William R. Wilson and Thomas E. Merrow. Such copending patent applications are hereby incorporated herein by reference.
Typically, a phase locked loop includes a phase detecting device, a voltage controlled oscillator (VCO) and a feedback circuit. The phase detecting device receives a reference clock signal and simultaneously receives a feedback clock signal. In response thereto, the phase detecting device generates phase detection signals having an amplitude indicating the difference in phase between its two clock signals. The VCO is coupled to receive the phase detecting signal. In response thereto, the VCO generates VCO output signals having a frequency proportional to the magnitude of the phase detection signal. For example, when the magnitude of the phase detection signal is relatively high, the VCO oscillates at a higher frequency than when the amplitude of the phase detection signal is relatively low. The output of the VCO is coupled to form the feedback clock signal through a feedback circuit. The feedback circuit, typically, either shapes the duty cycle of the VCO output signal or divides the frequency of the VCO output signal by some integer.
Phase locked loops are utilized, for example, to generate a plurality of control signals in synchronism with the reference clock signal. Synchronization between the control clocks and the reference signal is largely dependent upon the operational characteristics of the phase detector. This is because the phase detector controls the VCO which either speeds up in frequency or slows down in frequency in response to the phase detection signals to correct errors indicated by the phase detection signals.
Prior art phase detectors generated the phase detection signal by creating pulse-width modulated signals and sending those signals through a low-pass filter. The width of the pulses of the pulse-width modulated signals were proportional to the difference in phase between the reference clock signal and the feedback clock signal. For example, a relatively small pulsewidth indicated that the oscillator must slow down to get into sync, whereas, a relatively wide pulsewidth indicated that the oscillator must speed up to get into sync. The pulse-width signals were fed through a low-pass filter to average the width of the pulses thereby generating phase detection signals having an amplitude indicating the phase difference between the reference signal and the feedback signal.
A problem with the above-described prior art is that the resulting phase detection signal doesn't quickly indicate instantaneous changes in phase between the reference clock signal and the feedback clock signal. This is because an inherent time delay is associated with low-pass filters. As a result, the VCO doesn't immediately correct for phase errors, and thus, the errors increase before correction occurs. The delay through a low-pass filter can be lessened by increasing the filter's cut-off frequency, but the result is that the phase detection signal will include a ripple voltage. Thus, the output of the voltage controlled oscillator will follow the ripple voltage and vary in frequency. Additionally, extension of the cut-off frequency of the filter increases the cost of the filter and also makes it too large for integration on a semiconductor chip.
Accordingly, it is one object of the invention to provide a phase locked loop capable of responding quickly to instantaneous frequency changes of a reference signal.
It is still another object of the invention to provide a phase locked loop having a phase detector with no ripple voltage on its phase detection signal.
Another object of the invention is to provide a quickly-responding phase locked loop which is capable of being integrated on a semiconductor chip.
Still another object of the invention is to provide an inexpensive phase locked loop having a fast response time.